| ARM Embedded Systems | |
| The RISC Design Philosophy | |
| The ARM Design Philosophy | |
| Embedded System Hardware | |
| Embedded System Software | |
| Summary | |
| ARM Processor Fundamentals | |
| Registers | |
| Current Program Status Register | |
| Pipeline | |
| Exceptions, Interrupts, and the Vector Table | |
| Core Extensions | |
| Architecture Revisions | |
| ARM Processor Families | |
| Summary | |
| Introduction to the ARM Instruction Set | |
| Data Processing Instructions | |
| Branch Instructions | |
| Load-Store Instructions | |
| Software Interrupt Instruction | |
| Program Status Register Instructions | |
| Loading Constants | |
| ARMv5E Extensions | |
| Conditional Execution | |
| Summary | |
| Introduction to the Thumb Instruction Set | |
| Thumb Register Usage | |
| ARM-Thumb Interworking | |
| Other Branch Instructions | |
| Data Processing Instructions | |
| Single-Register Load-Store Instructions | |
| Multiple-Register Load-Store Instructions | |
| Stack Instructions | |
| Software Interrupt Instruction | |
| Summary | |
| Efficient C Programming | |
| Overview of C Compilers and Optimization | |
| Basic C Data Types | |
| C Looping Structures | |
| Register Allocation | |
| Function Calls | |
| Pointer Aliasing | |
| Structure Arrangement | |
| Bit-fields | |
| Unaligned Data and Endianness | |
| Division | |
| Floating Point | |
| Inline Functions and Inline Assembly | |
| Portability Issues | |
| Summary | |
| Writing and Optimizing ARM Assembly Code | |
| Writing Assembly Code | |
| Profiling and Cycle Counting | |
| Instruction Scheduling | |
| Register Allocation | |
| Conditional Execution | |
| Looping Constructs | |
| Bit Manipulation | |
| Efficient Switches | |
| Handling Unaligned Data | |
| Summary | |
| Optimized Primitives | |
| Double-Precision Integer Multiplication | |
| Integer Normalization and Count Leading Zeros | |
| Division | |
| Square Roots | |
| Transcendental Functions: log, exp, sin, cos | |
| Endian Reversal and Bit Operations | |
| Saturated and Rounded Arithmetic | |
| Random Number Generation | |
| Summary | |
| Digital Signal Processing | |
| Representing a Digital Signal | |
| Introduction to DSP on the ARM | |
| FIR filters | |
| IIR Filters | |
| The Discrete Fourier Transform | |
| Summary | |
| Exception and Interruput Handling | |
| Exception Handling | |
| Interrupts | |
| Interrupt Handling Schemes | |
| Summary | |
| Firmware | |
| Firmware and Bootloader | |
| Example: Sandstone | |
| Summary | |
| Embedded Operating Systems | |
| Fundamental Components | |
| Example: Simple Little Operating System | |
| Summary | |
| Caches | |
| The Memory Hierarchy and Cache Memory | |
| Cache Architecture | |
| Cache Policy | |
| Coprocessor 15 and Caches | |
| Flushing and Cleaning Cache Memory | |
| Cache Lockdown | |
| Caches and Software Performance | |
| Summary | |
| Memory Protection Units | |
| Protected Regions | |
| Initializing the MPU, Caches, and Write Buffer | |
| Demonstration of an MPU system | |
| Summary | |
| Memory Management Units | |
| Moving from an MPU to an MMU | |
| How Virtual Memory Works | |
| Details of the ARM MMU | |
| Page Tables | |
| The Translation Lookaside Buffer | |
| Domains and Memory Access Permission | |
| The Caches and Write Buffer | |
| Coprocessor 15 and MMU Configuration | |
| The Fast Context Switch Extension | |
| Demonstration: A Small Virtual Memory System | |
| The Demonstration as mmuSLOS | |
| Summary | |
| The Future of the Architecture | |
| Advanced DSP and SIMD Support in ARMv6 | |
| System and Multiprocessor Support Additions to ARMv6 | |
| ARMv6 Implementations | |
| Future Technologies beyond ARMv6 | |
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