Introduction | p. 1 |
Trends and Challenges | p. 2 |
Physical Limits and Search for New Materials | p. 5 |
Challenges | p. 6 |
Choice of Materials | p. 7 |
Why Copper (Cu) Interconnects? | p. 7 |
New Technologies | p. 15 |
Multilayer Metal Architecture | p. 15 |
Substrate Engineering | p. 16 |
An Alternate Technology for Interconnects | p. 19 |
Materials Used in Modern Integrated Circuits | p. 21 |
Properties of Copper | p. 23 |
Grain Size | p. 24 |
Melting Temperature | p. 25 |
Barrier Layer | p. 27 |
Low-K Dielectric Materials | p. 28 |
Polymers | p. 30 |
Semiconductors | p. 33 |
Silicon (Si) | p. 33 |
Challenges and Accomplishments | p. 35 |
Challenges | p. 35 |
Accomplishments | p. 35 |
Technologies of the 21st Century, and the Plan to Meet the Challenges | p. 38 |
Ultra-Shallow Junction (USJ) | p. 40 |
Circuit Design and Architecture Improvements | p. 41 |
Performance and Leakage in Low Standby Power (LSTP) Systems | p. 42 |
Introduction of New Materials and Integration Processes | p. ,43 |
Nano-Materials | p. 44 |
Superconductors | p. 45 |
Integration Processes | p. 47 |
Summary | p. 53 |
References | p. 55 |
Dielectric Materials | p. 67 |
Introduction | p. 67 |
Interlayer Dielectric (ILD) | p. 71 |
Introduction | p. 71 |
Mathematical Model | p. 74 |
Selection Criteria for an Ideal Low-K Material | p. 76 |
Search for an Ideal Low-K Material | p. 78 |
Achievement | p. 83 |
Impact of Low-K ILD Materials on the Cu-Damascene Process | p. 92 |
Deposition Techniques | p. 95 |
High-K Dielectric Materials | p. 97 |
Introduction | p. 97 |
Impact on Scaling and Requirements | p. 98 |
Search for a Suitable High-K Dielectric Material | p. 99 |
Deposition Technology for High-K Materials | p. 102 |
Summary | p. 102 |
References | p. 103 |
Diffusion and Barrier Layers | p. 111 |
Diffusion | p. 111 |
Introduction | p. 111 |
Transitional Effects | p. 113 |
Mathematical Modeling of Diffusion in Cu-Interconnects | p. 114 |
Grain Boundary (GB) Diffusion | p. 118 |
Vacancy Diffusion | p. 120 |
Drift Diffusion | p. 121 |
Interdiffusion | p. 122 |
Diffusion of Copper and Its Consequences | p. 122 |
Precipitation | p. 124 |
Barrier Layer for Cu-Interconnects | p. 125 |
Theory | p. 125 |
Ideal Barrier Layer | p. 126 |
Barrier Layer Architecture | p. 126 |
Interlayer Reactions | p. 128 |
Influence of the Barrier Layer Properties on the Reliability of Cu-Interconnects | p. 132 |
Low-K Dielectric-Barrier Layer | p. 135 |
Reaction Rates | p. 135 |
Influence of the Barrier Layer on the Electrical Conductivity of Cu-Lines | p. 139 |
Influence of Barrier Layer Thermal Conductivity on Cu-Line | p. 141 |
Classification of Barrier Layer | p. 144 |
Properties of Different Barrier Layer Materials | p. 145 |
Cap-Layer, Its Properties and Functions | p. 148 |
Summary | p. 150 |
References | p. 151 |
Pattern Generation | p. 161 |
Photolithography | p. 161 |
Introduction | p. 161 |
Resolution Limits of Optical Lithography | p. 164 |
Deep Ultraviolet (DUV) Lithography | p. 168 |
Reticles | p. 173 |
Enhancement Techniques for Resolution | p. 175 |
157 nm Lithography | p. 179 |
Chemically Amplified Resist (CA) | p. 183 |
Extreme Ultraviolet (EUV) Lithography | p. 185 |
e-Beam Lithography (EBL) | p. 189 |
Electron-Beam Resist | p. 192 |
e-Beam Reticle | p. 195 |
Step and Flash Imprint Lithography (SFIL) | p. 195 |
Etching and Cleaning of Damascene Structures | p. 197 |
Etching | p. 197 |
Cleaning | p. 210 |
Summary | p. 214 |
References | p. 216 |
Deposition Technologies of Materials for Cu-Interconnects | p. 223 |
Introduction | p. 223 |
Emerging Technologies | p. 224 |
Cu-Damascene Process | p. 224 |
Barrier Layer Requirements | p. 225 |
Deposition Requirements | p. 225 |
Thin Film Growth and Theory of Nucleation | p. 226 |
Nucleation Theory | p. 227 |
Instrumentation | p. 230 |
Physical Vapor Deposition | p. 230 |
Sputtering | p. 231 |
Ionized Physical Vapor Deposition (IPVD) | p. 234 |
Chemical Vapor Deposition (CVD) | p. 236 |
Plasma Enhanced CVD (PECVD) System | p. 236 |
Metal-Organic Vapor Deposition (MOCVD) | p. 238 |
Low Temperature Thermal CVD (LTTCVD) System | p. 240 |
Atomic Layer Deposition (ALD) | p. 241 |
Plating | p. 243 |
History of Electroplating and Printed Circuit Boards (PCBs) | p. 243 |
DC Bath Chemistry | p. 244 |
Electroplating of Copper Inside Damascene Architecture | p. 245 |
Process Chemistry for Superconformal Electrodeposition of Copper | p. 247 |
Electrochemical Mechanical Deposition (ECMD) | p. 248 |
Influence of the Seed Layer on Electroplating | p. 249 |
Electroless Deposition of Copper | p. 250 |
Stress in Cu-Interconnects | p. 251 |
Summary | p. 253 |
References | p. 254 |
The Copper Damascene Process and Chemical Mechanical Polishing | p. 267 |
The Copper Damascene Process | p. 267 |
Introduction | p. 267 |
Conventional Metallization Technology | p. 270 |
Cu-Damascene Metallization Technology | p. 271 |
General Objectives and Challenges | p. 276 |
Chemical Mechanical Polishing (CMP) and Planarization | p. 278 |
Introduction | p. 278 |
Chemical Mechanical Polishing (CMP) Technology | p. 279 |
Copper Dishing Model | p. 285 |
Slurry Chemistry | p. 286 |
Particle Size Inside the Slurry | p. 287 |
Relative Velocity of the Pad and Wafer | p. 289 |
Pad Pressure | p. 289 |
Pad-Elasticity | p. 289 |
Pad Conditioning | p. 289 |
Shallow Trench Isolation (STI) | p. 290 |
Abrasive Free Polishing | p. 291 |
End-Point Detection | p. 291 |
Dry In Dry Out | p. 292 |
Multi-Step Processing | p. 293 |
Post-CMP Cleaning | p. 293 |
CMP Pattern Density Issues | p. 295 |
Summary | p. 296 |
References | p. 296 |
Conduction and Electromigration | p. 301 |
Conduction | p. 301 |
Introduction | p. 301 |
Conduction Mechanism and Restrictions | p. 303 |
Effect of Grain Boundary (GB) Resistance on the Conductivity of Cu-Interconnects | p. 311 |
Effect of Grain Size and Morphology of the Substrate | p. 311 |
Morphology of the Cu-Film and Its Influence on the Conduction (Electrical) Mechanism of Cu-Interconnects | p. 312 |
Effect of Film Thickness on the Conductivity of Cu-Interconnects | p. 317 |
Diffusion Related Impacts on the Conductivity of a Cu-Line | p. 318 |
Cu-Line Stress and Its Consequences | p. 319 |
Conduction of Heat Through Cu-Interconnects | p. 321 |
Thermal Cycling (Annealing) Related Phenomena | p. 322 |
Electromigration (EM) | p. 324 |
| p. 324 |
Mechanism of Electromigration (EM) and Its Effects | p. 325 |
Void Formation | p. 329 |
Analytical Model on Stress Related EM | p. 330 |
Effect of Microstructure of the Film on Mass Migration | p. 333 |
Effect of Solute on Electromigration | p. 335 |
Melting Temperature of a Metal and Its Effect on Grain Growth | p. 335 |
Effect of Temperature on EM | p. 336 |
Current Density and Its Effect on EM | p. 336 |
Summary | p. 336 |
References | p. 337 |
Routing and Reliability | p. 347 |
Routing | p. 347 |
Introduction | p. 347 |
Methods of Improving Interconnect Routings | p. 349 |
Interconnect Routing Design | p. 351 |
Challenges with High Density Routing | p. 359 |
Cascaded Driver | p. 361 |
Transmission Line Coupling | p. 361 |
Clocking of High-Speed System | p. 361 |
Reliability | p. 362 |
Introduction | p. 362 |
Reliability Issues Related to Cu-Interconnects | p. 365 |
Measurements | p. 388 |
Summary | p. 393 |
References | p. 394 |
Glossary (Copper Interconnects) | p. 405 |
Index | p. 415 |
Table of Contents provided by Ingram. All Rights Reserved. |