High Voltage Devices and Circuits in Standard CMOS Technologies - Hussein Ballan

High Voltage Devices and Circuits in Standard CMOS Technologies

By: Hussein Ballan, Michel Declercq

Hardcover | 31 October 1998

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Standard voltages used in today's ICs may vary from about 1.3V to more than 100V, depending on the technology and the application. High voltage is therefore a relative notion.
High Voltage Devices and Circuits in Standard CMOS Technologies is mainly focused on standard CMOS technologies, where high voltage (HV) is defined as any voltage higher than the nominal (low) voltage, i.e. 5V, 3.3V, or even lower. In this standard CMOS environment, IC designers are more and more frequently confronted with HV problems, particularly at the I/O level of the circuit.
In the first group of applications, a large range of industrial or consumer circuits either require HV driving capabilities, or are supposed to work in a high-voltage environment. This includes ultrasonic drivers, flat panel displays, robotics, automotive, etc. On the other hand, in the emerging field of integrated microsystems, MEMS actuators mainly make use of electrostatic forces involving voltages in the typical range of 30 to 60V. Last but not least, with the advent of deep sub-micron and/or low-power technologies, the operating voltage tends towards levels ranging from 1V to 2.5V, while the interface needs to be compatible with higher voltages, such as 5V.
For all these categories of applications, it is usually preferable to perform most of the signal processing at low voltage, while the resulting output rises to a higher voltage level. Solving this problem requires some special actions at three levels: technology, circuit design and layout.
High Voltage Devices and Circuits in Standard CMOS Technologies addresses these topics in a clear and organized way. The theoretical background is supported by practical information and design examples. It is an invaluable reference for researchers and professionals in both the design and device communities.

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