| Figures | p. xi |
| Preface | p. xv |
| Acknowledgements | p. xvii |
| Language Basics | p. 1 |
| Specification versus Modeling | p. 4 |
| Concurrency and Sequentiality | p. 5 |
| Nondeterminism | p. 6 |
| Communication | p. 9 |
| Hierarchy | p. 9 |
| The Languages in this Book | p. 11 |
| Choosing a Language | p. 13 |
| Exercises | p. 14 |
| Hardware | p. 15 |
| Hardware Basics | p. 17 |
| Schematic Diagrams | p. 19 |
| The Spice Format | p. 21 |
| Sequential Logic | p. 23 |
| Finite-state Machines: The Traffic Light Controller | p. 24 |
| The Kiss Format | p. 27 |
| Exercises | p. 29 |
| Verilog | p. 31 |
| Two Examples | p. 32 |
| Modules, Instances, and Structure | p. 36 |
| Nets, Registers, and Expressions | p. 37 |
| Gate and Switch-level Primitives | p. 41 |
| User-defined Primitives | p. 41 |
| Continuous Assignment | p. 43 |
| Parameters and Macros | p. 43 |
| Behavioral Code: Initial and Always blocks | p. 46 |
| Tasks and Functions | p. 49 |
| The Programming Language Interface (PLI) | p. 50 |
| Logic Synthesis and the Register-Transfer Level Subset | p. 51 |
| Event-driven Simulation | p. 52 |
| Exercises | p. 54 |
| VHDL | p. 55 |
| Entities and Architectures | p. 57 |
| Structural Description | p. 59 |
| Dataflow Description: Concurrent Signal Assignment | p. 61 |
| Behavioral Description: Processes | p. 62 |
| Procedures and Functions | p. 67 |
| Types and Expressions | p. 69 |
| Attributes | p. 72 |
| Packages and Libraries | p. 74 |
| Exercises | p. 77 |
| Software | p. 79 |
| Software Basics | p. 81 |
| Representing Numbers | p. 82 |
| Types | p. 84 |
| Control Flow | p. 85 |
| Functions, Procedures, and Subroutines | p. 86 |
| Interrupts | p. 86 |
| I/O | p. 87 |
| Memory Management | p. 87 |
| Rom: Read-Only Memory | p. 88 |
| Device Drivers | p. 88 |
| Exercises | p. 88 |
| Assembly Languages | p. 91 |
| Cisc: The i386 Architecture | p. 92 |
| Risc: The Mips Architecture | p. 96 |
| Harvard Architecture Dsps: The 56000 Architecture | p. 98 |
| Vliw Dsps: The 320c6 Architecture | p. 106 |
| Exercises | p. 110 |
| The C Language | p. 113 |
| Overview | p. 114 |
| Types | p. 116 |
| Variables and Storage | p. 118 |
| Expressions | p. 120 |
| Control Flow | p. 123 |
| Functions | p. 127 |
| The Standard Library | p. 129 |
| The Preprocessor | p. 130 |
| History | p. 132 |
| Compilation | p. 134 |
| Alignment of Structures, Unions | p. 135 |
| Nondeterminsm | p. 136 |
| Exercises | p. 137 |
| C++ | p. 139 |
| Overview | p. 140 |
| Classes | p. 142 |
| Single Inheritance and Virtual Functions | p. 145 |
| Multiple Inheritance | p. 147 |
| Namespaces | p. 148 |
| Templates | p. 150 |
| Exceptions | p. 153 |
| Operator Overloading | p. 154 |
| The Standard Library | p. 155 |
| History | p. 159 |
| Implementing Inheritance and Virtual Functions | p. 161 |
| Exercises | p. 163 |
| Java | p. 165 |
| Types | p. 166 |
| Expressions | p. 169 |
| Classes | p. 169 |
| Interfaces | p. 170 |
| Exceptions | p. 171 |
| Threads | p. 172 |
| Packages | p. 174 |
| Type wrappers | p. 174 |
| Garbage Collection | p. 174 |
| Java in Embedded Systems | p. 175 |
| Exercises | p. 176 |
| Operating Systems | p. 177 |
| Timesharing Systems | p. 179 |
| Real-Time Operating Systems | p. 180 |
| Real-Time Scheduling | p. 181 |
| Rate-Monotonic Scheduling | p. 183 |
| Priority Inversion | p. 183 |
| Interprocess Communication | p. 184 |
| Other Services | p. 185 |
| Exercises | p. 186 |
| Dataflow | p. 187 |
| Kahn Process Networks | p. 189 |
| The Language | p. 189 |
| Determinism | p. 192 |
| Execution | p. 193 |
| Exercises | p. 195 |
| Synchronous Dataflow | p. 197 |
| Scheduling | p. 199 |
| Looped Scheduling | p. 203 |
| Cyclo-Static Dataflow | p. 205 |
| Exercises | p. 207 |
| Hybrid | p. 209 |
| Esterel | p. 211 |
| An Example | p. 212 |
| Basic Signal-Handling Instructions | p. 214 |
| Derived Statements | p. 216 |
| Reincarnation | p. 217 |
| Compilation Into Automata | p. 218 |
| Compilation Into Boolean Circuits | p. 219 |
| Compilation with Synthesized Context Switches | p. 221 |
| Exercises | p. 222 |
| Polis | p. 223 |
| Cfsms and the Shift Format | p. 224 |
| Communication | p. 225 |
| Finite-State Machines | p. 228 |
| Hardware Synthesis | p. 232 |
| Software Synthesis | p. 232 |
| Communication Synthesis | p. 233 |
| Exercises | p. 237 |
| SDL | p. 239 |
| An Example | p. 240 |
| Structure: Systems and Blocks | p. 241 |
| Processes | p. 243 |
| The Save Construct | p. 243 |
| Timers | p. 245 |
| Exercises | p. 246 |
| SystemC | p. 247 |
| An Example | p. 248 |
| Modules | p. 250 |
| Processes | p. 250 |
| Types | p. 254 |
| Ports, Signals, and Clocks | p. 255 |
| Scheduling SystemC | p. 256 |
| Exercises | p. 257 |
| CoCentric System Studio | p. 259 |
| An Example | p. 259 |
| Models | p. 263 |
| Dataflow models | p. 263 |
| Primitive models | p. 264 |
| Exercises | p. 265 |
| Internet Resources | p. 267 |
| Acronym Glossary | p. 273 |
| Bibliography | p. 277 |
| Index | p. 283 |
| Table of Contents provided by Syndetics. All Rights Reserved. |