Languages for Embedded Systems and their Applications

Selected Contributions on Specification, Design, and Verification from FDL'08

By: Martin Radetzki (Editor)

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Hardcover | 30 April 2009

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Hardcover
340 Pages

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23.5 x 15.5 x 2.54

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Embedded systems take over complex control and data processing tasks in diverse application ?elds such as automotive, avionics, consumer products, and telec- munications. They are the primary driver for improving overall system safety, ef?ciency, and comfort. The demand for further improvement in these aspects can only be satis?ed by designing embedded systems of increasing complexity, which in turn necessitates the development of new system design methodologies based on speci?cation, design, and veri?cation languages. The objective of the book at hand is to provide researchers and designers with an overview of current research trends, results, and application experiences in c- puter languages for embedded systems. The book builds upon the most relevant contributions to the 2008 conference Forum on Design Languages (FDL), the p- mier international conference specializing in this ?eld. These contributions have been selected based on the results of reviews provided by leading experts from - search and industry. In many cases, the authors have improved their original work by adding breadth, depth, or explanation.

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You Can Find This Book In

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Model-Based System Specification Languages
Power and Energy Estimations in Model-Based Design	p. 3
Introduction	p. 3
AADL Component Based Design Flow	p. 5
Consumption Analysis: the Methodology	p. 7
Power Estimation	p. 8
Power Models	p. 9
Multi-level Estimation	p. 11
Power Estimation for Complex DSP	p. 14
Power Estimation for Field Programmable Gate Array	p. 16
Power Estimation for Operating System Services	p. 17
Ethernet Communications Consumption Modelling	p. 18
Models	p. 19
Consumption Analysis Tool	p. 20
Property Sets	p. 20
Conclusion	p. 23
References	p. 24
MARTE vs. AADL for Discrete-Event and Discrete-Time Domains	p. 27
Introduction	p. 27
Marte Time Model	p. 28
Definitions	p. 29
Event-Triggered Communications	p. 29
Time-Triggered Communications	p. 30
Periodic Tasks and Physical Time	p. 31
TimeSquare	p. 31
AADL	p. 31
Modeling Elements	p. 31
AADL Application Software Components	p. 32
AADL Flows	p. 33
AADL Ports	p. 33
Three Different Configurations	p. 34
The Aperiodic Case	p. 34
The Mixed Event-Data Flow Case	p. 37
The Periodic Case	p. 38
Conclusion	p. 39
Glossary	p. 40
References	p. 40
Generation of MARTE Allocation Models from Activity Threads	p. 43
Introduction	p. 43
Related Work	p. 45
Building System Models with MARTE	p. 46
Utilizing Activity Threads for Design Space Exploration	p. 47
Generating MARTE Allocation Models with Activity Threads	p. 48
A Prototypic Implementation of the Method	p. 51
Visualization of Performance Feedback	p. 53
Summary and Outlook	p. 54
References	p. 55
Model-Driven System Validation by Scenarios	p. 57
Introduction	p. 57
ASMs and ASMETA	p. 59
Scenario-Based Validation of ASM Models	p. 60
The AVALLA Language	p. 60
The Model-Driven Validation Environment	p. 61
From SystemC UML Models to ASM Models	p. 62
Model Validator	p. 64
The Simple Bus Case Study	p. 64
Related Work	p. 66
Conclusions and Future Work	p. 68
References	p. 68
An Advanced Simulink Verification Flow Using SystemC	p. 71
Introduction	p. 71
Related Work	p. 72
Extended Verification Flow	p. 73
Conventional Flow	p. 73
Extending the Verification Flow	p. 76
Implementation	p. 77
Synchronization	p. 77
Data Type Conversion	p. 80
Evaluation	p. 80
Implementation	p. 80
Extended Verification Flow	p. 82
Conclusion	p. 83
References	p. 84
Languages for Heterogeneous System Design
VHDL-AMS Implementation of a Numerical Ballistic CNT Model	p. 87
Introduction	p. 87
Mobile Charge Density and Self-Consistent Voltage	p. 88
Numerical Piece-Wise Approximation of the Charge Density	p. 89
Performance of Numerical Approximations	p. 91
VHDL-AMS Implementatation	p. 93
Conclusion	p. 98
References	p. 99
Wide-Band Sigma-Delta ADC Design in Superconducting Technology	p. 101
Introduction	p. 101
Sigma-Delta Second Order Architecture	p. 102
Bandpass Sigma-Delta Modulator	p. 102
The Josephson Junction	p. 103
The RSFQ Balanced Comparator	p. 105
Sigma Delta Modulator Operation with Josephson Junctions	p. 105
System Modeling with VHDL-AMS	p. 106
The Sigma-Delta ADC Design	p. 107
Clock and Comparator Design	p. 107
Simulation Results	p. 109
Conclusion	p. 111
References	p. 112
Heterogeneous and Non-linear Modeling in SystemC-AMS	p. 113
Introduction	p. 113
SystemC-AMS Modeling Platform	p. 114
Summary of Electrostatic Harvester Operation	p. 116
SystemC-AMS Modeling of the Harvester	p. 118
Resonator Modeling	p. 118
Implementation of the Conditioning Circuit Model	p. 119
Model of the Whole System	p. 123
Modeling Results	p. 124
Description of the Modeling Experiment	p. 124
Modeling Results Validation	p. 126
Conclusion	p. 127
References	p. 127
Digital Systems Design Methodologies Based on C++
Application Workload and SystemC Platform Modeling for Performance Evaluation	p. 131
Introduction	p. 131
Performance Modeling and Simulation	p. 133
Application and Workload Modeling	p. 133
Execution Platform Modeling	p. 134
Allocation and Transformation to SystemC	p. 137
Performance Simulation	p. 138
Mobile Video Player Case Example	p. 138
Modeling of the Execution Platform Components	p. 139
Modeling of the Services	p. 141
Modeling of the Application	p. 143
Analysis of Simulation Results	p. 144
Conclusions	p. 145
References	p. 146
Adaptive Interconnect Models for Transaction-Level Simulation	p. 149
Introduction	p. 149
Related Work	p. 151
Adaptive Interconnect Models	p. 152
Point-to-Point Communication	p. 152
Bus-Based Communication	p. 154
Model Implementation	p. 157
An Adaptive FSL Model	p. 157
An Adaptive AHB Model	p. 158
Experimental Results	p. 160
Conclusion	p. 164
References	p. 164
Efficient Architecture Evaluation Using Functional Mapping	p. 167
Introduction	p. 167
Functional Mapping	p. 168
Timing Behavior	p. 169
Conventional Code Transformation	p. 169
Optimization Approach	p. 171
Class Unitized	p. 171
Customize and Apply Unitized	p. 173
Application of u_trace	p. 174
Using the Approach in the Design Flow	p. 175
Handling Arrays	p. 175
Design Example	p. 176
Simulation Results	p. 178
Limitations and Experiences	p. 179
Summary	p. 181
Outlook	p. 181
References	p. 181
Symbolic Scheduling of SystemC Dataflow Designs	p. 183
Introduction	p. 183
Model of Computation	p. 184
Symbolic Representation	p. 187
QSS of SysteMoC Models	p. 189
Transition Graphs	p. 190
Path Searching	p. 191
Scheduling Algorithm	p. 193
Related Work	p. 195
Example	p. 196
Conclusions and Further Work	p. 197
References	p. 198
SystemC Simulation of Networked Embedded Systems	p. 201
Introduction	p. 201
The Architecture of SCNSL	p. 203
Main Components of SCNSL	p. 204
Main Problems Solved by SCNSL	p. 207
Simulation of RTL Models	p. 207
Assessment of Transmission Validity	p. 207
Simulation Planning	p. 208
Application to a Wireless Scenario	p. 208
Experimental Results	p. 210
Conclusions	p. 210
References	p. 211
Modeling of Embedded Software Multitasking in SystemC/OSSS	p. 213
Introduction	p. 213
Related Work	p. 214
The OSSS Design Flow	p. 216
Application Layer	p. 216
Virtual Target Architecture Layer	p. 217
Modeling Software in OSSS	p. 218
Abstraction of Run-time System	p. 218
Software Tasks	p. 219
Software Shared Objects	p. 220
Software Execution Times	p. 221
Exploration of Platform Effects	p. 222
Simulation Results	p. 223
Accuracy and Performance	p. 223
Lazy Synchronization	p. 224
Conclusion	p. 225
References	p. 225
High-Level Reconfiguration Modeling in SystemC	p. 227
Introduction	p. 227
Related Work	p. 228
Basic Reconfiguration Modeling	p. 229
Interpreting Reconfiguration as Circuit Switch	p. 229
Creating Reconfigurable Modules from Static Ones	p. 230
Control	p. 231
Advanced ReChannel Features	p. 231
Exportals	p. 231
Synchronization	p. 232
Explicit Description of Reconfiguration	p. 233
Resettable Processes	p. 234
Resettable Components	p. 236
Binding Groups of Switches	p. 237
Case Study	p. 238
Conclusion and Future Work	p. 239
References	p. 240
Stream Programming for FPGAs	p. 241
Introduction	p. 241
Stream Computing	p. 243
Streaming on FPGAs	p. 244
Compiling Brook to Hardware	p. 244
Example Brook Program	p. 246
Exploiting Data Parallelism	p. 248
Experimental Evaluation	p. 250
Results	p. 251
Concluding Remarks	p. 252
References	p. 253
Verification and Requirements Evaluation
A New Verification Technique for Custom-Designed Components at the Arithmetic Bit Level	p. 257
Introduction	p. 257
Normalization Method	p. 259
ABL Normalization	p. 259
Mixed ABL/Gate-Level Problems	p. 262
Synthesis of ABL Descriptions from Gate-Level Models	p. 263
Generation of the Equivalent ABL Descriptions for Boolean Functions in Reed-Muller Form	p. 264
Experimental Results	p. 268
Conclusion and Future Work	p. 271
References	p. 272
Debugging Contradictory Constraints in Constraint-Based Random Simulation	p. 273
Introduction	p. 273
SystemC Verification Library	p. 275
Contradiction Analysis	p. 276
Problem Formulation	p. 276
Concepts for Contradiction Analysis	p. 277
Implementation	p. 280
Experimental Evaluation	p. 282
Types of Contradictions	p. 283
Effect of Property 1 and Property 2	p. 284
Real-Life Example	p. 285
Conclusions	p. 288
References	p. 289
Design of Communication Infrastructures for Reconfigurable Systems	p. 291
Introduction	p. 291
Related Works	p. 293
Real World Applications Analysis	p. 293
Applications Layer	p. 294
Scenarios Layer	p. 295
Characteristics Layer	p. 295
Metrics Layer	p. 296
The Proposed Solution	p. 297
High Level Description	p. 298
High Level Network Simulation	p. 299
Evaluation and Selection	p. 301
Verification and Validation	p. 302
Results	p. 302
Concluding Remarks	p. 306
References	p. 306
Analysis of Non-functional Properties of MPSoC Designs	p. 309
Introduction	p. 309
Related Work	p. 311
Preliminaries	p. 312
Activity Model	p. 312
Power Management Model	p. 313
Design Flow	p. 313
Abstraction of System Functionality	p. 314
Simulation Model Generation	p. 315
Communication Dependency Graphs	p. 315
Temporal Environment Models	p. 316
Integration of Power Consumption and Power Management	p. 318
Battery Models, Placement and Chip Environment	p. 319
Experimental Results	p. 320
Conclusions	p. 322
References	p. 323
Table of Contents provided by Ingram. All Rights Reserved.

Languages for Embedded Systems and their Applications

Selected Contributions on Specification, Design, and Verification from FDL'08

At a Glance

Hardcover

Shipping

How to return your order

Defective items

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