Foreword vii
Preface ix
Acknowledgments xiii
1 Microwave Amplifier Fundamentals 1
1.1 Introduction 2
1.2 Scattering Parameters and Signal Flow Graphs 2
1.3 Reflection Coefficients 5
1.4 Gain Expressions 7
1.5 Stability 9
1.6 Noise 10
1.7 ABCD Matrix 14
1.7.1 ABCD Matrix of a Series Impedance 14
1.7.2 ABCD Matrix of a Parallel Admittance 15
1.7.3 Input Impedance of Impedance Loaded Two-Port 15
1.7.4 Input Admittance of Admittance Loaded Two-Port 16
1.7.5 ABCD Matrix of the Cascade of Two Systems 16
1.7.6 ABCD Matrix of the Parallel Connection of Two Systems 17
1.7.7 ABCD Matrix of the Series Connection of Two Systems 17
1.7.8 ABCD Matrix of Admittance Loaded Two-Port Connected in Parallel 17
1.7.9 ABCD Matrix of Impedance Loaded Two-Port Connected in Series 19
1.7.10 Conversion Between Scattering and ABCD Matrices 19
1.8 Distributed Network Elements 20
1.8.1 Uniform Transmission Line 20
1.8.2 Unit Element 21
1.8.3 Input Impedance and Input Admittance 22
1.8.4 Short-Circuited Stub Placed in Series 23
1.8.5 Short-Circuited Stub Placed in Parallel 24
1.8.6 Open-Circuited Stub Placed in Series 24
1.8.7 Open-Circuited Stub Placed in Parallel 25
1.8.8 Richard’s Transformation 25
1.8.9 Kuroda Identities 28
References 35
2 Introduction to the Real Frequency Technique: Multistage Lumped Amplifier Design 37
2.1 Introduction 37
2.2 Multistage Lumped Amplifier Representation 38
2.3 Overview of the RFT 40
2.4 Multistage Transducer Gain 41
2.5 Multistage VSWR 43
2.6 Optimization Process 44
2.6.1 Single-Valued Error and Target Functions 44
2.6.2 Levenberg–Marquardt–More Optimization 46
2.7 Design Procedures 48
2.8 Four-Stage Amplifier Design Example 49
2.9 Transistor Feedback Block for Broadband Amplifiers 57
2.9.1 Resistive Adaptation 57
2.9.2 Resistive Feedback 57
2.9.3 Reactive Feedback 57
2.9.4 Transistor Feedback Block 58
2.10 Realizations 59
2.10.1 Three-Stage Hybrid Amplifier 59
2.10.2 Two-Stage Monolithic Amplifier 62
2.10.3 Single-Stage GaAs Technology Amplifier 64
References 64
3 Multistage Distributed Amplifier Design 67
3.1 Introduction 67
3.2 Multistage Distributed Amplifier Representation 68
3.3 Multistage Transducer Gain 70
3.4 Multistage VSWR 71
3.5 Multistage Noise Figure 73
3.6 Optimization Process 74
3.7 Transistor Bias Circuit Considerations 75
3.8 Distributed Equalizer Synthesis 78
3.8.1 Richard’s Theorem 78
3.8.2 Stub Extraction 80
3.8.3 Denormalization 82
3.8.4 UE Impedances Too Low 83
3.8.5 UE Impedances Too High 85
3.9 Design Procedures 88
3.10 Simulations and Realizations 92
3.10.1 Three-Stage 2–8 GHz Distributed Amplifier 92
3.10.2 Three-Stage 1.15–1.5 GHz Distributed Amplifier 94
3.10.3 Three-Stage 1.15–1.5 GHz Distributed Amplifier (Noncommensurate) 94
3.10.4 Three-Stage 5.925–6.425 GHz Hybrid Amplifier 96
References 99
4 Multistage Transimpedance Amplifiers 101
4.1 Introduction 101
4.2 Multistage Transimpedance Amplifier Representation 102
4.3 Extension to Distributed Equalizers 104
4.4 Multistage Transimpedance Gain 106
4.5 Multistage VSWR 109
4.6 Optimization Process 110
4.7 Design Procedures 111
4.8 Noise Model of the Receiver Front End 114
4.9 Two-Stage Transimpedance Amplifier Example 116
References 118
5 Multistage Lossy Distributed Amplifiers 121
5.1 Introduction 121
5.2 Lossy Distributed Network 122
5.3 Multistage Lossy Distributed Amplifier Representation 127
5.4 Multistage Transducer Gain 130
5.5 Multistage VSWR 132
5.6 Optimization Process 133
5.7 Synthesis of the Lossy Distributed Network 135
5.8 Design Procedures 141
5.9 Realizations 144
5.9.1 Single-Stage Broadband Hybrid Realization 144
5.9.2 Two-Stage Broadband Hybrid Realization 145
References 149
6 Multistage Power Amplifiers 151
6.1 Introduction 151
6.2 Multistage Power Amplifier Representation 152
6.3 Added Power Optimization 154
6.3.1 Requirements for Maximum Added Power 154
6.3.2 Two-Dimensional Interpolation 156
6.4 Multistage Transducer Gain 159
6.5 Multistage VSWR 162
6.6 Optimization Process 163
6.7 Design Procedures 164
6.8 Realizations 166
6.8.1 Realization of a One-Stage Power Amplifier 166
6.8.2 Realization of a Three-Stages Power Amplifier 167
6.9 Linear Power Amplifiers 172
6.9.1 Theory 172
6.9.2 Arborescent Structures 175
6.9.3 Example of an Arborescent Linear Power Amplifier 176
References 179
7 Multistage Active Microwave Filters 181
7.1 Introduction 181
7.2 Multistage Active Filter Representation 182
7.3 Multistage Transducer Gain 184
7.4 Multistage VSWR 186
7.5 Multistage Phase and Group Delay 187
7.6 Optimization Process 188
7.7 Synthesis Procedures 189
7.8 Design Procedures 195
7.9 Simulations and Realizations 198
7.9.1 Two-Stage Low-Pass Active Filter 198
7.9.2 Single-Stage Bandpass Active Filter 200
7.9.3 Single-Stage Bandpass Active Filter MMIC Realization 202
References 206
8 Passive Microwave Equalizers for Radar Receiver Design 207
8.1 Introduction 207
8.2 Equalizer Needs for Radar Application 208
8.3 Passive Equalizer Representation 209
8.4 Optimization Process 212
8.5 Examples of Microwave Equalizers for Radar Receivers 213
8.5.1 Sixth-Order Equalizer with No Transmission Zeros 213
8.5.2 Sixth-Order Equalizer with Two Transmission Zeros 214
References 217
9 Synthesis of Microwave Antennas 219
9.1 Introduction 219
9.2 Antenna Needs 219
9.3 Antenna Equalizer Representation 221
9.4 Optimization Process 222
9.5 Examples of Antenna-Matching Network Designs 223
9.5.1 Mid-Band Star Antenna 223
9.5.2 Broadband Horn Antenna 224
References 227
Appendix A: Multistage Transducer Gain 229
Appendix B: Levenberg–Marquardt–More Optimization Algorithm 239
Appendix C: Noise Correlation Matrix 245
Appendix D: Network Synthesis Using the Transfer Matrix 253
Index 271
