The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits

The semi-empirical and compact model approaches

By: Paul Jespers

Write A Review

Hardcover | 4 December 2009

At a Glance

Hardcover
188 Pages

Dimensions(cm)
24.13 x 16.51 x 1.91

Hardcover

$199.75

or 4 interest-free payments of $49.94 with

Ships in 5 to 7 business days

IC designers appraise currently MOS transistor geometries and currents to compromise objectives like gain-bandwidth, slew-rate, dynamic range, noise, non-linear distortion, etc. Making optimal choices is a difficult task. How to minimize for instance the power consumption of an operational amplifier without too much penalty regarding area while keeping the gain-bandwidth unaffected in the same time? Moderate inversion yields high gains, but the concomitant area increase adds parasitics that restrict bandwidth. Which methodology to use in order to come across the best compromise(s)? Is synthesis a mixture of design experience combined with cut and tries or is it a constrained multivariate optimization problem, or a mixture? Optimization algorithms are attractive from a system perspective of course, but what about low-voltage low-power circuits, requiring a more physical approach? The connections amid transistor physics and circuits are intricate and their interactions not always easy to describe in terms of existing software packages.

The gm/ID synthesis methodology is adapted to CMOS analog circuits for the transconductance over drain current ratio combines most of the ingredients needed in order to determine transistors sizes and DC currents.

Shipping

	Standard Shipping	Express Shipping
Metro postcodes:	$9.99	$14.95
Regional postcodes:	$9.99	$14.95
Rural postcodes:	$9.99	$14.95

Orders over $79.00 qualify for free shipping.

How to return your order

At Booktopia, we offer hassle-free returns in accordance with our returns policy. If you wish to return an item, please get in touch with Booktopia Customer Care.

Additional postage charges may be applicable.

Defective items

If there is a problem with any of the items received for your order then the Booktopia Customer Care team is ready to assist you.

For more info please visit our Help Centre.

You Can Find This Book In

Non-Fiction Engineering & Technology Electronics & Communications Engineering Electronics Engineering Electronic Devices & Materials Semi-Conductors & Super-Conductors Circuits & Components Computing & I.T.Computer Science Computer Architecture & Logic Design

Other Editions and Formats

Paperback

Published: 3rd May 2012

View Product

Sizing the Intrinsic Gain Stage	p. 1
The Intrinsic Gain Stage	p. 1
The Intrinsic Gain Stage Frequency Response	p. 1
Sizing the Intrinsic Gain Stage	p. 3
Sizing the I.G.S. with the Quadratic Model	p. 4
Sizing the I.G.S. by Means of the Weak Inversion Model	p. 4
Sizing the I.G.S. in the Moderate Inversion Region	p. 5
The gm/ID Sizing Methodology	p. 7
Conclusions	p. 8
The Charge Sheet Model Revisited	p. 11
Why the Charge Sheet Model?	p. 11
The Generic Drain Current Equation	p. 11
The Charge Sheet Model Drain Current Equation	p. 13
Common Source Characteristics	p. 15
The ID(VD) Characteristics	p. 15
The ID(VG) Characteristic of the Saturated Transistor	p. 17
Drift and Diffusion Contributions to the Drain Current	p. 18
Weak Inversion Approximation of the Charge Sheet Mode	p. 18
The gm/ID Ratio in the Common Source Configuration	p. 20
Common Gate Characteristics of the Saturated Transistor	p. 23
A Few Concluding Remarks Concerning the C.S.M	p. 24
Graphical Interpretation of the Charge Sheet Model	p. 25
A Graphical Representation of ID	p. 25
More on the VT Curve	p. 28
Two Approximate Representations of VT	p. 29
The 'Linear' Surface Potential Approximation	p. 29
The 'Linear' Threshold Voltage VT Approximation	p. 31
A Few Examples Illustrating the Use of the Graphical Construction	p. 32
The MOS Diode	p. 32
The MOS Source Follower	p. 32
The CMOS Inverter	p. 33
Small Signal Transconductances	p. 34
CMOS Transmission Gates	p. 35
How to Implement Quasi-linear Resistors with MOS Transistors	p. 36
Source-Bootstrapping	p. 37
A Closer Look to the Pinch-Off Region	p. 38
Conclusion	p. 39
Compact Modeling	p. 41
The Basic Compact Model	p. 41
The E.K.V. Model	p. 42
The VT(V) Characteristic	p. 42
The Drain Current	p. 45
The Equations of the Basic E.K.V. Model	p. 46
Graphical Interpretation of the E.K.V. Model	p. 47
The Common Source Characteristics ID (VG)	p. 48
Strong and Weak Inversion Asymptotic Approximations Derived from the Compact Model	p. 50
Checking the Compact Model Against the C.S.M	p. 50
The Acquisition Algorithm (MATLAB Identif3.m)	p. 50
Verification	p. 52
Evaluation of gm/ID	p. 54
Sizing the Intrinsic Gain Stage by Means of the E.K.V. Model	p. 55
The Common-Gate gms/ID Ratio	p. 57
An Earlier Compact Model	p. 58
Modeling Mobility Degradation	p. 59
The Impact of Mobility Degradation on the Drain Current	p. 59
The Impact of Mobility Degradation on the gm/ID Ratio	p. 64
Sizing the Intrinsic Gain Stage in the Presence of Mobility Degradation	p. 65
Conclusion	p. 66
The Real Transistor	p. 67
Short Channel Effects	p. 67
Checking the Validity of the Compact Model when its Parameters vary with the Source and Drain Voltages	p. 6
E.K.V Parameter Identification (MATLAB IdentifDemo.m)	p. 70
How to Introduce Mobility Degradation?	p. 73
Drain Current Reconstruction	p. 75
Compact Model Parameters Versus Bias and Gate Length	p. 76
The Influence of the Gate Length on the Model Parameters	p. 76
The Influence of Bias Conditions on the Parameters	p. 78
Reconstructing ID (vDS) Characteristic	p. 82
Evaluation of gx/ID Ratios	p. 84
The gm/ID Ratio	p. 85
The gd/ID Ratio	p. 88
Conclusions	p. 91
The Real Intrinsic Gain Stage	p. 93
The Dependence on Bias Conditions of the gm/ID and gd/ID Ratios (MATLAB fig061.m)	p. 93
Sizing the I.G.S with 'Semi-empirical' Data	p. 94
Sizing the I.G.S Loaded by a Constant Total Capacitance	p. 95
Introduction of Extrinsic Capacitances	p. 99
Sizing the I.G.S Loaded by a Constant Load Capacitance	p. 103
Model Driven Sizing of the I.G.S	p. 104
Sizing W and ID (MATLAB fig612.m)	p. 104
Evaluation of the Intrinsic Gain (MATLAB fig613.m)	p. 106
An Alternative Method to Evaluate the Gain (MATLAB fig615.m)	p. 107
A Simplified Sizing Procedure	p. 110
Slew-Rate Considerations	p. 111
Conclusions	p. 112
The Common-Gate Configuration	p. 113
Drain Current Versus Source-to-Substrate Voltage (Matlab fig071.m)	p. 113
The Cascoded Intrinsic Gain Stage	p. 115
Sizing the Cascode (Matlab fig074.m)	p. 115
Gain Evaluation of the Cascode (MATLAB fig075.m)	p. 117
The Poles of the Cascode Circuit (MATLAB fig075.m)	p. 118
Sizing the Miller Op. Amp	p. 121
Introductory Considerations	p. 121
The Miller Op. Amp	p. 121
Analysis of the Miller Operational Amplifier	p. 122
Pole Splitting	p. 123
The Impact of the Current Mirror	p. 126
Poles and Zeros	p. 127
Sizing the Miller Operational Amplifier (MATLAB OpAmp.m)	p. 129
Sizing a Low-voltage Miller Op. Amp	p. 130
Sizing a High-Frequency Low-Power Miller Op. Amp	p. 140
Conclusion	p. 142
How to Utilize the Data available under 'extras.springer.com'	p. 143
Global Variables	p. 143
An Example Making Use of the 'Semi-empirical' Data: The Evaluation of Drain Currents and gm/Io Ratio Matrices (MATLAB A12.m)	p. 144
An Example Making Use of the E.K.V Global Variables: The Elaboration of an ID(VGS)Characteristic (Matlab A13.m)	p. 146
The 'MATLAB' Toolbox	p. 149
Charge Sheet Model Files	p. 149
The pMat(T,N,tox) Function	p. 149
The surfpot(p,V,VG) Function	p. 150
The IDsh(p,VS,VD,VG) Function	p. 151
Compact Model Files	p. 151
The Identif3(Nb,tox,VFB,T) Function	p. 151
The invq(z) Function	p. 152
The ComS(VGS,VDS,VS,lg) Function	p. 152
Other Functions	p. 152
The jctCap(L,W,R,V) Function	p. 152
The Gss(x,H) Function	p. 153
Temperature and Mismatch, from C.S.M. to E.K.V.	p. 155
The Influence of the Temperature on the Drain Current (MATLAB A31.m)	p. 155
The Influence of the Temperature on gm/ID (Matlab A32.m)	p. 56
Temperature Dependence of E.K.V Parameters (MATLAB A33.m)	p. 158
The Impact of Technological Mismatches on the Drain Current (Matlab A34.m)	p. 159
Mismatch and E.K.V Parameters (MATLAB A35.m)	p. 161
E.K.V. Intrinsic Capacitance Model	p. 163
Bibliography	p. 167
Index	p. 169
Table of Contents provided by Ingram. All Rights Reserved.

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits

The semi-empirical and compact model approaches

At a Glance

Hardcover

Shipping

How to return your order

Defective items

You Can Find This Book In

Other Editions and Formats

Paperback

More in Circuits & Components

Open Circuits

The Inner Beauty of Electronic Components

Make : Analog Synthesizers

A modern approach to old-school sound synthesis

Circuits and Systems

A Modern Approach

Recent Advances in Compact Antennas

Encyclopedia of Electronic Components

Resistors, Capacitors, Inductors, Semiconductors, Electromagnetism

Make: Electronic Music from Scratch

A Beginner's Guide to Homegrown Audio Gizmos

Learning the Art of Electronics

A Hands-On Lab Course

Encyclopedia of Electronic Components Volume 2

Make: More Electronics

Journey Deep into the World of Logic Chips, Amplifiers, Sensors, and Randomicity

Introductory Circuit Analysis, Global Edition

14th Edition

The Audio Circuits Cookbook

Building Blocks and Tools to Design Professional Audio Devices

Make: Electronics, 3e

Learning by Discovery: A hands-on primer for the new electronics enthusiast

Getting Started with Soldering

A Hands-On Guide to Making Electrical and Mechanical Connections

Smart Grids

Sustainable Energy Systems

Signal Integrity in Digital Systems

Principles and Practice

Bridge Structural Health Monitoring

The Truss Bridge Management System

Electricity for the Entertainment Electrician and Technician

Electricity, Power Distribution, and Electrical Safety for the Stage and Set

Electricity for the Entertainment Electrician and Technician

Electricity, Power Distribution, and Electrical Safety for the Stage and Set

Tiny Machine Learning Techniques for Constrained Devices

Resilient Hybrid Electronics for Extreme/Harsh Environments

5G and Beyond Wireless Networks

Technology, Network Deployments, and Materials for Antenna Design

Advanced Field-Effect Transistors

Theory and Applications

Design and Control of Physical and Cyber-Physical Systems

Electrical Drive Simulation with MATLAB/Simulink

Selected Technologies

This product is categorised by