| List of Acronyms | p. xi |
| List of Figures | p. xv |
| List of Tables | p. xxi |
| Preface | p. xxiii |
| Introduction | p. 1 |
| Error Control Coding | p. 2 |
| Block Codes | p. 4 |
| Some Common Linear Block Codes | p. 5 |
| Convolutional Codes | p. 7 |
| Information Theory and Channel Capacity | p. 10 |
| The Magic of Turbo Codes | p. 17 |
| Outline of the Book | p. 20 |
| Turbo Decoding Principles | p. 23 |
| Turbo Codes and LDPC codes | p. 23 |
| Iterative Decoding Principle | p. 25 |
| BCJR Algorithm | p. 25 |
| Tools for Iterative Decoding of Turbo Codes | p. 25 |
| Log-likelihood Algebra | p. 25 |
| Soft Channel Outputs | p. 27 |
| Principle of the Iterative Decoding Algorithm | p. 29 |
| Optimal and Suboptimal Algorithms | p. 30 |
| MAP algorithm | p. 30 |
| Log-MAP Algorithm | p. 33 |
| Max-function | p. 34 |
| Max-Log-MAP Algorithm | p. 36 |
| SOVA Algorithm | p. 36 |
| Parallel Concatenation | p. 38 |
| The Component Encoder with Binary Codes | p. 39 |
| Interleaving | p. 41 |
| Trellis Termination | p. 41 |
| Puncturing | p. 42 |
| Multiple Parallel Concatenation of Turbo Codes | p. 43 |
| Applications of Parallel Concatenated Turbo Codes | p. 43 |
| Turbo Codes in 3GPP | p. 44 |
| Trellis Termination for Turbo Encoder | p. 45 |
| Turbo Code Internal Interleaver | p. 45 |
| Turbo Codes in CDMA2000 | p. 46 |
| Turbo Codes for Deep Space Communications | p. 46 |
| Serial Concatenation | p. 48 |
| Structure of SCCC | p. 49 |
| Decoding Procedure of Serial Concatenation Codes | p. 50 |
| Summary | p. 51 |
| Non-binary Turbo Codes: DVB/RCS Standard | p. 53 |
| Design of Double-binary CRSC Codes | p. 53 |
| Two-level Permutation (Interleaving) | p. 54 |
| Circular Recursive Systematic Convolutional (CRSC) Codes | p. 54 |
| Circular States (Tail-biting) Principle | p. 55 |
| Iterative Decoding Principle for Circular Recursive Codes | p. 57 |
| Double-binary CRSC Codes in DVB/RCS Standard | p. 58 |
| System Model | p. 59 |
| Encoder Structure | p. 59 |
| Description of Permutation | p. 61 |
| Rates and Puncturing Maps | p. 62 |
| Order of Transmission and Mapping to QPSK Constellation | p. 62 |
| Decoder Structure | p. 64 |
| Decoding Procedure of Double-binary Convolutional Turbo Codes | p. 65 |
| Decoding Rule for CRSC Codes with a Non-binary Trellis | p. 65 |
| Simplified Max-Log-MAP Algorithm for Double-binary Convolutional Turbo Code | p. 67 |
| Initialization and the Final Decision | p. 71 |
| Simulation Results | p. 72 |
| Summary | p. 73 |
| Spectrally Efficient Non-binary Turbo Codes: Beyond DVB/RCS | p. 77 |
| Design of Triple-binary Codes for 8PSK Modulation | p. 77 |
| System Model | p. 78 |
| Constituent Encoder | p. 78 |
| Circular State | p. 80 |
| Description of the Turbo Code Permutation | p. 80 |
| Puncturing Map, Order of Transmission and Mapping to 8PSK Constellation | p. 82 |
| Iterative Decoding Procedure | p. 84 |
| Max-Log-MAP Algorithm for Triple-binary Codes | p. 85 |
| Initialization and the Final Decision | p. 88 |
| Simulation Results | p. 89 |
| Turbo Trellis Coded Modulation Schemes | p. 90 |
| Pragmatic Binary Turbo Coded Modulation | p. 91 |
| Turbo Trellis Coded Modulation | p. 92 |
| Summary | p. 94 |
| Block Turbo Codes | p. 97 |
| Introduction | p. 97 |
| Trellis-Based Decoding | p. 97 |
| Augmented List Decoding | p. 98 |
| Concatenated Block Codes with Block Interleaver | p. 99 |
| Serial Concatenated Block Codes | p. 99 |
| Parallel Concatenated Block Codes | p. 101 |
| Iterative Decoding of Concatenated Block Codes | p. 101 |
| Serial Iterative Decoding | p. 102 |
| Parallel Iterative Decoding | p. 102 |
| Augmented List Decoding of BTC | p. 104 |
| Chase-II Algorithm | p. 104 |
| Example of Chase Algorithm | p. 105 |
| Reliability of Decision D | p. 106 |
| Computing the Soft Decision at the Output of the Soft-input Decoder | p. 108 |
| Iterative Decoding of Product Codes | p. 109 |
| Simulation Results | p. 110 |
| Trellis-based Decoding of BTC | p. 112 |
| MAP Algorithm | p. 112 |
| Soft-Output Calculation | p. 114 |
| Summary | p. 115 |
| Reed-Muller Codes and Reed-Muller Turbo Codes | p. 117 |
| Introduction | p. 117 |
| Reed-Muller Codes | p. 118 |
| Minimal Trellis for Linear Block Codes | p. 120 |
| Notations and Definitions | p. 121 |
| Minimal Trellis Construction of Linear Block Codes | p. 122 |
| BCJR Construction | p. 122 |
| Massey Construction | p. 123 |
| Trellis Diagram of the RM Code | p. 124 |
| Reed-Muller Turbo Codes | p. 125 |
| RM Turbo Encoder | p. 125 |
| Turbo Decoder | p. 127 |
| Iterative Decoding of a Two-Dimensional Code | p. 127 |
| System Model | p. 128 |
| Simulation Results | p. 129 |
| Design of RM Turbo Codes for Satellite ATM | p. 131 |
| Shortening Patterns for the RM Turbo Codes | p. 131 |
| Simulation Results | p. 133 |
| Summary | p. 137 |
| Performance of BTCs and their Applications | p. 139 |
| Introduction | p. 139 |
| Some Results from the Literatures | p. 139 |
| Applications of Block Turbo Codes | p. 142 |
| Broadband Wireless Access Standard | p. 144 |
| Advanced Hardware Architectures (AHA) | p. 145 |
| Comtech EF Data | p. 147 |
| Turbo Concept | p. 149 |
| Paradise Data Com | p. 150 |
| Summary | p. 151 |
| Implementation Issues | p. 153 |
| Fixed-point Implementation of Turbo Decoder | p. 153 |
| Input Data Quantization for DVB-RCS Turbo Codes | p. 155 |
| Input Data Quantization for BTC | p. 157 |
| The Effect of Correction Term in Max-Log-MAP Algorithm | p. 159 |
| Effect of Channel Impairment on Turbo Codes | p. 163 |
| System Model for the Investigation of Channel Impairments | p. 163 |
| Channel SNR Mismatch | p. 164 |
| Simulation Results | p. 165 |
| Carrier Phase Recovery | p. 170 |
| The Effect of Phase Offset on the Performance of RM Turbo Codes | p. 170 |
| The Effect of Preamble Size on the Performance of RM Turbo Codes | p. 170 |
| Simulation Results | p. 170 |
| Hardware Implementation of Turbo Codes | p. 171 |
| Summary | p. 175 |
| Low Density Parity Check Codes | p. 177 |
| Gallager Codes: Regular Binary LDPC Codes | p. 177 |
| Random Block Codes | p. 178 |
| Generator Matrix | p. 179 |
| Parity Check Matrix | p. 179 |
| Regular Binary LDPC Codes: Original Gallager Codes | p. 179 |
| Construction of Regular Gallager Codes | p. 180 |
| Decoding | p. 181 |
| Introduction of Gallager's Decoding | p. 181 |
| Syndrome Decoding Based on Tanner's Graph | p. 182 |
| Initialization | p. 183 |
| Updating R[superscript a subscript ij] | p. 185 |
| Updating Q[superscript a subscript ij] | p. 186 |
| Tentative Decoding | p. 186 |
| New Developments | p. 186 |
| MacKay's Constructions | p. 187 |
| Irregular Matrices | p. 189 |
| Performance Analysis of LDPC Codes | p. 190 |
| Comparison of Empirical Results | p. 190 |
| Analysis of LDPC Codes Performance | p. 192 |
| Summary | p. 194 |
| The Contents of CD-ROM | p. 195 |
| References | p. 197 |
| Index | p. 211 |
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